Technology-Aware Programming Environment
(Chong, Reppy, Franklin, Martonosi, Brown, Schuster, Harrow, Farhi, Shor)
EPiQC aims to shift research focus from general QC, traditionally based on abstraction and optimistic assumptions, towards much sharper attention on the aspects useful computations on quantum machines of practical scale in the next five years. Much prior work has centered on algorithms with input sizes of millions of qubits. The EPiQC research effort on compiler, synthesis, and verification will build on these experiences, but will focus in on compiling problems that require hundreds of qubits instead of millions, with much more realistic physical layer models commensurate with the hardware that might become available in five years.
Specialized Compilation for Smaller Machines
Our shift in focus is in many ways analogous to the shift from general-purpose computing to lightweight embedded computing, in the sense that we focus on smaller, more customized hardware heavily limited by the available computational resources. The resource constraints force tight optimization to meet qubit count targets. We will explore treating QC compilation as an optimal scheduling problem to reduce resource usage. Our work will build off past experience for mixed integer linear programming (MILP) scheduling to reduce resource usage in other embedded systems applications. We will also draw from recent shifts in compiler research on program synthesis and constraint satisfaction and apply them to QC. Because the QC problems we attack will necessarily have small inputs, we can focus compile time on deep optimization using SAT or MILP approaches rather than on traditional pass-driven compilation. Another key aspect of the proposed compilation flow will be dynamic reconfiguration. We expect our QC to be highly reconfigurable, i.e., gates and interconnections between components can be instantiated on-demand, especially in the ion trap platform. That adds another layer of complexity that distinguishes the QC from classical computers. FPGAs allow reconfigurability with ability to load configuration bits, but the specific roles of hardware units are fixed and thus provide limited flexibility in reconfigurability. In EPiQC, we will exploit the degree of freedom provided by classical control logic to instantiate and retire quantum logic circuits in a dynamic manner.
Our compilation framework will be designed to track technology-dependent machine parameters. For example, a key difference between quantum and classical computation is the inability to copy signals or perform a fan-out. As a result, quantum data that needs to interact with multiple components in an algorithm must be sequentially transported from place to place. How this transport occurs depends on the underlying quantum hardware platform. The qubit transport characteristics will be an important parameter in the compilation process. Similarly, we will study input parameters such as the choice of fault-tolerant strategy, the execution times of logic operations (including qubit transport time), waiting for constrained resources to become available, and the intrinsic nature of gate operations that succeed probabilistically.